in the name of zero

experienced sleep paralysis. freaky as hell! i was half asleep. i knew.. because i can see my room. a few minutes before.. i felt someone/or something creeping up from behind me-and then it happened. the whole ordeal freaked me out!

the extreme malevolent evil manifest with every intention to kill - i guess i knew instinctively. Manifest evil is not something I am given to commonly contemplating. I grew up with a religious fear of both God and the Devil. So this image and theme came as a disturbing revelation.

the science explained by wikipedia (http://en.wikipedia.org/wiki/Sleep_paralysis) is supposed to make me feel better and a little more educated… i guess. but im not feeling reassured anytime soon. infact, im writing this entry at 3:17 am - to just keep myself awake!

that is some freaky shit i just experienced.

i’ve been rather consistent in my electrical learning with regards to schedule. the concepts, compelling, and i plan to drill the fundamentals (minus the hardcore physics stuff) in my head. my officemates have been more than helpful in explaining and teaching me the ways of electricity.

[ teaching the mind to do tricks is painful ]

the past nights, i’ve covered Ohm’s law and have solved some beginner problems.BUT - the thing i found frustrating at first was determining if a specific circuit is series or parallel - especially in bigger circuits with multiple paths. anyway, i’m over that frustration now and i’m beginning to have that automatic mental ability of re-drawing a circuit in my mind so i can see things clearly.

[ kirchoff’s law ]

“The algebraic sum of the currents into any point of the circuit must equal the algebraic sum of the currents going out of that point”

and

“The algebraic sum of all voltages in a loop must equal zero”

the first sample circuit problem is outlined below: solve for the current across resistor R3.

i reached only up to the two equations part since the I1 terms of both equations could not cancel out each other.

stuck halfway…

i still had 2 unkowns (I1 and I2). turning to the book, it said i need to normalize I1 in such a way that subtraction of those two equations will cancel out the terms with I1 - multiplying the second equation by 4.

there are many more problems i plan to solve but i’ve had enough kirchoffs law for one day.

being your own teacher… is its own reward

i’ve been reading and learning about analog and digital electronics during my free time and during weekends. it has been a great learning experience and i wish i had a formal curriculum to follow with this gig. its been at most 4 years since i last used boolean algebra to this extent so im expecting things to be a bit rusty and wrong. i’m starting with the infamous 4 bit BCD to 7 segment since it’s the most basic, confidence boosting, hands-on activity i can think of.

[updates]

the problem with my initial kmaps was that they didn’t follow gray code. therefore, 00, 01, 10, 11 should have been 00, 01, 11, 00 wherein only a single bit changes everytime. a binary sequence from 01 to 10 changes two bits; 0 to 1, and 1 to 0 in their corresponding places.

i also noticed that the number of logic gates used to implement a 7 segment that displays 0x0-0xF is staggering and it would take up an exceedingly large space in my breadboard, so i lowered the digits it could display up to 9 only.

the figure below is my new truth table, with 10-15 as dont-cares.

which yields the following logic circuit for A to G.

but a simplification is still in order, mainly because there are combinations that yield a shorter sub-expression.

A = A + C + BD + B'D'
	
1) (A + C + BD + B'D')'              ; de morgan's
	
2) (A') (C') (B' + D') (B + D)       ; distribute
	
3) (A') (C') (B'B + B'D + BD' + D'D) ; theorem 16: A'A = 0
	
4) (A') (C') (B'D + BD')             ; A'B + AB' < => A xor B
	
5) ((A’) (C’) (B xor D))’            ; de morgan’s
	
6) A + C + (B xor D)’                ; final answer

assuming only single - 2 input cmos gates + sinle inverters

A + C + BD + B'D' = 6 gates
	
A + C + (B xor D)' = 4 gates

thats a savings of 2 logic gates!

the simplified XOR expression is very elegant, but i don’t have any CMOS xor gates in hand right now. so i’m sticking with the longer logic expressions which does not utilize an XOR operation.